1. Field of the Invention
The present invention relates to a lead frame, and more particularly, to a semiconductor package lead frame in which a protection layer for protecting an intermediate layer deposited on the upper surface of a metal substrate is improved in applying a preplating method (pre-plated frame), and a lead frame plating method.
2. Description of the Related Art
Like semiconductor chips, a lead frame is essential for a semiconductor package and acts as both a conductive wire for connecting the chip of a semiconductor package to an external circuit and a support for supporting the semiconductor chip. Such a semiconductor lead frame has various shapes according to high-density and high-integration of a semiconductor chip and a substrate mounting method.
A basic semiconductor lead frame is comprised of an inner lead portion which is wire-bonded to a pad portion for mounting a chip being a semiconductor memory element and maintaining the mounted chip in a static state, and an external lead portion for connecting to an external circuit. A semiconductor lead frame having such a configuration is usually manufactured by stamping or etching.
Lead frames manufactured by the two methods are wire-bonded to a chip safely seated on the pad portion. The chip and the inner lead portion of the lead frame, which have been wire-bonded to each other, are molded by a mold compound to accomplish a semiconductor package.
During the manufacture of this semiconductor package, the cross-sections of the pad portion and the inner lead portion of the lead frame are plated with a metal such as silver in order to provide a good wire bond property between the chip and the inner lead portion of the lead frame and good characteristics of the pad portion. After a resin passivation film is molded, a predetermined area of the outer lead portion is soldered, i.e., plated with tin--lead (Sn--Pb) to improve solderability for mounting a substrate.
However, this process necessarily requires a wet-etching process after the resin passivation film molding process, which degrades the reliability of completed products.
In order to solve the above problem, a preplating method (pre-plated frame) has been proposed for pre-coating a solder-wettable material and forming a protection layer for protecting the material before a semiconductor packaging process.
FIG. 1 shows an example of such a conventional lead frame.
As shown in FIG. 1, a nickel thin intermediate layer 22 and an outermost protection layer 23 are sequentially stacked on a metal substrate 21 made of copper or a copper alloy.
The protection layer is made of either palladium (Pd) or a palladium alloy, and the nickel thin layer and the protection layer each are accomplished by electroplating using direct current (DC).
In the lead frame configured as described above, the intermediate layer 22 formed on the upper surface of the metal substrate 21 prevents solderability degradation caused by oxidation due to spreading of copper or iron in a metal substrate made of copper, a copper alloy, or an iron--nickel alloy up to the surface, and prevents copper oxide or sulfide from being generated. Also, the intermediate layer 22 protects the metal substrate 21 when the protection layer 23 made of palladium is cracked.
Since the protection layer made of palladium is formed on the upper surface of the intermediate layer as described above, when soldered, the palladium on the surface is fused, spreads into lead, and joins with the lead. Thus, an interface between the lead and nickel is accomplished, and the line of the intermediate layer is protected when the intermediate layer is cracked.
However, the protection layer of the lead frame is plated using a DC current method, so that the protection layer 23 cannot be formed to a uniform thickness on the surface as shown in FIG. 1. The reason for this relates to the nonuniform nuclear growth within a plating solution. That is, when a DC current is applied, ions unevenly spreading within the plating solution are moved to the metal surface and deposited. At this time, crystal growth occurs around a large nucleus, and a pin hole is generated between nuclei. Hydrogen ions permeate the pin hole and are captured, so that the plated surface is rough and the plated layer has a thin portion 23a as shown in FIG. 1. In particular, when a DC current is used, the shape of an electric double layer between the metal substrate 21 and the plating solution is a direct current regardless of the state of the metal substrate. Thus, a current is relatively concentrated at a protruded portion of the substrate surface. Accordingly, concentrated precipitation occurs on this portion, so that the surface of this portion is rougher than the surface of the metal substrate. When the electric double layer between the plating solution and the metal substrate gets larger, the nuclear growth becomes even more uneven since the ions move at different times. Thus, a local thickness deviation of the plated layer is generated.
If the plating thickness of the protection layer is reduced to 3 microinches or less because of such a problem, the passive layer cannot perform its function, and the intermediate layer and the lower metal substrate 21 are eroded or atoms are spread while the lead frame is bent or while a semiconductor is assembled. Therefore, wire bondability and solderabilty are degraded.
Furthermore, if the protection layer is 3 microinches or more thick, the manufacturing costs increase by 30% or more compared to when a conventional Ag plating is used. Thus, the above-described lead frame is not cost-competitive.
U.S. Pat. No. 5,510,197 discloses restrictions on the thicknesses of the protection layer and the intermediate layer formed on the upper surface of the metal substrate, and an embodiment of plating using vapor deposition among other physical deposition methods. As disclosed in the above document, an intermediate layer is formed of nickel or a nickel alloy to a thickness of 50 to 20000 .ANG. on a base substrate made of copper or a copper alloy, and a protection layer is formed of gold, gold alloy, silver, silver alloy, palladium, or palladium alloy to a thickness of 10 to 500 .ANG. on the intermediate layer by vapor deposition or ion sputtering. Such a structure results from the fact that if the thickness of the protection layer is 10 .ANG. or less, solderability is not good, and if the thickness of the protection layer is 500 .ANG. or more, the quality does not get any better, and the manufacturing costs increase.
In the lead frame as described above, the protection layer is formed by vapor deposition or ion sputtering being a physical deposition method. Thus, the lead frame is difficult to apply to a continuous production system, and its production cost increases.